Video summary

🔥How to Prepare for VLSI Placements? || Full Roadmap || Himanshu Agarwal

Main summary

Key takeaways

Educational

Main ideas / roadmap (VLSI Analog, Digital, Mixed-signal + Aptitude)

The speaker outlines a placement-prep roadmap for VLSI campus roles, covering:

  • Aptitude (for written tests)
  • Analog VLSI (most crucial for interviews/written tests)
  • Digital VLSI (broad set for written tests + interviews)
  • Where/how to study (YouTube channels, playlists, books)
  • Where/how to practice (question sets, assignments)
  • How his courses/test series cover the syllabus (pricing, access duration, promo codes)
  • Project suggestions to add to the CV (but with emphasis on fundamentals over projects)

Aptitude section (written-test priority)

  • He says aptitude will be covered quickly (conceptually within ~1 minute).
  • Key instruction: Focus on the most important aptitude chapters—he claims these are sufficient and likely cover everything asked.
  • Approach:
    1. Learn the listed chapters
    2. Use YouTube videos by searching the chapter/topic name
    3. Practice questions on IndiaBix

Practice tools / course offering (his platform)

  • He created an aptitude test series/course.
  • The test series is included if you take the full course.
  • Claimed size: ~500–600 problems + aptitude content (he later mentions aptitude hours too).

Analog VLSI roadmap (core of the video)

A) Network analysis (foundation + interview/written basics)

  • Basics of network analysis
    • He states these aren’t always directly asked in interviews, but they’re essential for understanding everything else.
  • Network theorems
    • Potential (rare) interview questions, e.g. Thevenin and Norton (he mentions them specifically).

B) Transient analysis (highest priority analog topic)

  • He calls transient analysis the most important section for interviews/written tests.
  • Explicit topics listed:
    • Basics of transient analysis
    • Signal prerequisites (signals are prerequisite to understand responses)
    • Response types:
      • RCRL circuit responses
      • Step response
      • Impulse response
      • Ramp response
      • Slope at t = 0+ (mentions slope at (t = 0+))
    • LC oscillator (may be asked)
  • Coverage tier emphasis:
    • Topics labeled 1 to 7 are “most important”
    • He implies 8–10 are also important but less critical than 1–7

C) Control systems + analog filters

  • Basics of control systems
  • Pole-zero concepts
    • Intuitive finding of poles/zeros
    • Drawing/understanding Bode plots (he mentions “B plots”)
  • Analog filter analysis
    • Low-pass
    • High-pass
    • Band-pass
    • Band-reject
  • Second-order circuit analysis
    • Using damping
    • Resonance is “certainly more important”
    • Mentions “miscellaneous”:
      • Using Fourier series to find filter output (if asked)
      • Time-domain analysis of second-order circuit (rare)

D) Analog circuits (high-yield chapters)

1) Diode circuits (written-test heavy)

  • Diode circuits: important for written tests
  • Clamper circuit and Clipper circuit
    • Mentions average diode current concepts in clamper circuits
  • Emphasis: many written-test questions; he discourages skipping diode topics.

2) MOSFET (completely/very very important)

  • MOSFET is described as the most important topic for analog VLSI interview performance.

3) Amplifiers and current mirrors

  • Simple amplifiers
  • Cascode amplifiers / cascode current mirrors
  • Why current mirrors are needed + advantages

4) Frequency response, feedback topology, differential amplifiers

  • Frequency response
  • Feedback topology
  • Differential amplifiers
  • Various MOS/analog inverter topics
    • He explicitly names CMOS inverter as very important for interviews

5) Operational amplifier (OP-Amp) (very important)

He lists OP-amp in detail:

  • Start from OP-amp basics (“black box”)
  • Virtual short concept
  • Linear applications under negative feedback:
    • Inverting amplifier
    • Non-inverting amplifier
    • Differentiator
    • Integrator
  • Non-idealities / specifications (interview focus):
    • Slew rate
    • CMR (common-mode rejection)
    • Offset / bias current
    • Understanding op-amp behavior under these non-idealities
  • Also includes (basic level; written-test relevant):
    • Comparator and rectifier
  • Schmitt trigger: “very very important”
  • Oscillators: “very very important”

6) BJT (lower priority but not to ignore)

  • He says BJT is not that important compared to MOS, but:
    • Written test might include basic BJT questions
    • Interview questions from BJT are “very rare”
  • Suggested minimum coverage:
    • Recognize BJT form
    • Identify NPN and PNP
    • Currents: collector/emitter/base
    • Understand the three terminals

7) Stability analysis (small but interview-relevant)

  • Stability analysis of negative feedback circuits may be asked.

Where to study analog (channels, playlists, books)

YouTube / channels he recommends

  • By Camb Sir (VitA?) with playlists including:
    • Basic electrical science
    • Micro-electronic circuits
    • OP-amp (he mentions three playlists)
  • Nagendra Sir: network analysis + analog circuits playlists
  • Analog IC design playlist (good only after analog circuits)
  • Professor Shanti
  • Professor Ravis (diode circuits + MOSFETs)
  • Rajavi Sir (electronics playlists)
  • His own playlist: “Cohort 0 to 10” (network analysis emphasis on problem solving)

Books (as listed)

  • Sadiku: Fundamentals of Electrical Circuits (network analysis basics)
  • Sedra/Smith: Microelectronic Circuits and Design (decent, lower priority)
    • He critiques it: claims some errors and less depth quality for MOS/BJT/OP-amp
  • Razavi: Design of Analog CMOS Integrated Circuits
  • Donald A. Neamen: Microelectronic Circuit Analysis and Design (calls it good; mentions it can work for analog)

Analog practice tasks (explicit list)

  • GATE practice: solve again (he claims written tests include similar concepts and people get confused)
  • Razi book exercises:
    • Solve at least the 3rd exercise
    • Solve the 4th if possible
    • Specifically MOS-related exercises
  • NPTEL assignments:
    • Solve analog-related assignments/courses (as practice)

Digital VLSI roadmap (core topics list + priority)

He divides digital into:

  • Must-cover basics
  • Major digital architecture topics

A) Must cover: basics (written test + interviews)

  • Boolean algebra
    • He was asked Boolean-algebra questions in his interview
  • Number system
    • Two’s complement is very important

B) Combinational + sequential circuits

Combinational/sequential

  • Combination circuits
  • Sequence circuits (explicitly mentioned)

Memory elements

  • Latches / flip-flops
    • Latches clarified as G/L (gate-level)
    • Gated latches
    • Master-slave JK flip-flop
    • Why master-slave JK is needed

Counters (explicit list)

  • Simple counter questions
  • Binary counter
  • Non-binary counter
  • Asynchronous
  • Synchronous
  • Hybrid
  • Johnson counter
  • Ring counter
  • Delay-based problems may appear

C) FSM (very important)

  • FSM is described as both very important and potentially confusing.
  • Topics:
    • Sequence generation
    • Sequence detection
    • Overlapping vs non-overlapping cases
    • Designing FSM for both overlapping and non-overlapping situations

D) Static Timing Analysis (STA) (very important)

Examples of STA questions:

  • Definitions/terms:
    • Setup time
    • Hold time
    • Propagation delay
    • Mentions: “whole time”, “clock time period”, “clock frequency”
  • Calculation-type:
    • Minimum clock period
    • Maximum allowable clock frequency
    • Hold margin
  • Interview anecdote:
    • Asked about setup time of a latch specifically

E) Data converters (low probability)

  • Rarely asked; if time is limited, comprehensive coverage can be ignored.
  • Still cover very basic concepts.

F) CMOS / MOS digital electronics (high yield)

  • CMOS VLSI transition logic
  • CMOS inverter
  • Ramp response / output response
  • Power dissipation in CMOS
    • Dynamic power
    • Leakage power
    • Short-circuit power
  • Noise margin calculation for CMOS inverter
  • Advantages of CMOS and why it’s used
  • Basic logic gate implementations

G) RC circuits (surprisingly asked in digital)

  • Digital interviews may ask RC-related questions.
  • Rationale: IC parasitics cause effective RC behavior.
  • Mentions an example concept: char sharing (likely “charge sharing”)

H) Basic Computer Architecture / COA (priority after STA/CMOS)

  • COA isn’t always mandatory, but can give an edge.
  • Topics:
    • Machine instructions
    • Addressing modes
  • He notes it may appear in written tests and interviews depending on company/interviewer.

I) C programming basics for written tests

  • Basic C programming questions can appear.
  • Priority up to: pointers
  • Mentions basic C++ programming earlier (written tests).

J) Verilog + VLSI IC design (later / lower immediate priority)

  • Suggests a digital IC design course by Professor Janakan Sir.
  • Notes interviewers may not go deep into it, but it can help.
  • Suggested priority order (rough):
    1. Cover everything until STA / near RC circuits
    2. Then COA basics + advanced COA, then C basics/pointers
    3. Then digital IC design
  • Verilog videos may be hard without COA coverage.

Where to study digital (resources)

YouTube channels / playlists mentioned

  • Professor SS (electronics/digital logic)
  • An electronics YouTube channel (general digital electronics)
  • His own channel: Prep Fusion Gate (placement-aligned difficulty)

NPTEL / course resources

  • Digital IC design by Professor Janakan Sir (high quality)

Books mentioned for digital

  • Morris Mano
  • Floyd
  • Samir Pal / Nitka
  • COA books: Patterson and HKI (as spoken)
  • His personal reliability notes:
    • He studied Mano and Floyd
    • Others he saw superficially but still recommends

How to practice digital questions

  • Use GATE IQ
  • Use a common GATE PDF (“DQS PDF”) with solutions
  • Also do assignments (NPTEL for analog practice; Gate-style for digital)

Course/product offerings mentioned (pricing + included components)

His analog course (Analog VLSI Mastery / Cohort)

  • Aptitude included (no need to take it separately)
  • Analog VLSI Mastery:
    • Claimed ~180+ technical hours + additional aptitude hours later mentioned
    • Claimed ~1500+ questions
    • Lecture notes PDFs included (no need to write notes)
    • Test series included
    • WhatsApp group for doubt solving
  • Pricing claims mentioned:
    • Roughly â‚ą400 for aptitude-only/test-series type earlier
    • Larger bundle later described as ~â‚ą3000 after promo code (and ~â‚ą4500 for longer access)
    • Another updated offer:
      • Access till 31 Dec 2024
      • Cost ~â‚ą2200 (for people needing December placements)

His digital course (Digital VLSI Design for campus placements)

  • Recorded video lectures, doubt solving, test series, lecture PDFs
  • Claimed hours:
    • Digital: 80 hours
    • Later he claims total combined course: 320+ hours (analog+digital+aptitude)
  • Claimed questions:
    • 2500+ problems / “more than a thousand problems” in course sections (varies by statement)

Combined course (Analog + Digital + Aptitude)

  • “Full course” pricing claims:
    • 6-month access: ~â‚ą4500
    • 12-month access: ~â‚ą7000
  • Promo codes mentioned:
    • job20
    • test30 or similar codes (discount for test series; he also mentions “test 34” due to subtitle errors)
  • Validity noted:
    • Some promos valid until Oct 11:59 p.m. (date unclear in subtitle)

Important limitation (digital course coverage)

  • Digital course does not cover:
    • COA
    • Verilog
  • External resources are provided/pointed out.
  • Promises (timing as expected/likely):
    • COA expected to be uploaded by December end (not guaranteed earlier)
    • Verilog expected in 2025 (no commitment beyond expectation)

Project guidance (what to include in CV)

Core principle

  • Projects are secondary to fundamentals.
  • He argues interviewers focus on fundamentals because projects can often be copied at student level.

Suggested digital projects (FSM / processor design)

  • FSM-based projects, e.g.:
    • Sequence detector
    • Parity detector
    • (and one more FSM-based idea)
  • After advanced COA: processor design projects

Suggested analog projects (Cadence-based)

  • Recommend learning Cadence tutorials first (via HK/KhS YouTube channel).
  • Suggested analog projects:
    • BGR design
    • Two-stage op-amp (2-stage OPAMP) design
  • Cadence access isn’t strictly required; fundamentals matter most.

Main “do this” methodology (condensed instruction list)

  1. Start with Aptitude
    • Study the listed aptitude chapters
    • Practice from IndiaBix + YouTube solutions
    • Use his aptitude test series/course if desired
  2. For Analog
    • Cover network analysis basics + network theorems
    • Prioritize transient analysis and all response types
    • Then control systems + pole-zero + filters
    • Then diode circuits (clamper/clipper), MOSFET, amplifiers, mirrors, frequency response, feedback
    • Do OP-amp fully (including non-idealities, comparator/rectifier, Schmitt trigger, oscillators)
    • Do only surface-level BJT
    • Include stability analysis
  3. For Digital
    • Basics: boolean algebra + number systems (two’s complement)
    • Combinational + sequential logic
    • Latches/flip-flops (master-slave JK)
    • Counters (many types)
    • FSM (overlap/non-overlap)
    • STA (setup/hold, min clock period, max frequency)
    • CMOS inverter/CMOS power/noise margins
    • Don’t ignore RC circuits
    • Then COA basics + advanced COA if time
    • C basics up to pointers
    • Verilog/digital IC design later (lower immediate priority)
  4. Practice
    • Solve GATE-style problems + exercise sets
    • Complete NPTEL assignments (especially analog)
  5. Projects (optional supporting material)
    • Add FSM/processor projects (digital)
    • Add BGR + two-stage OPAMP using Cadence tutorials (analog)
    • Don’t expect projects to compensate for weak fundamentals

Speakers / sources featured (as named in subtitles)

Main speaker

  • Himanshu Agarwal (host/speaker; also named in the video title)

Other educators / creators referenced

  • Camb Sir
  • Nagendra Sir
  • Professor Shanti
  • Professor Ravis
  • Rajavi Sir
  • Anish S (channel creator)
  • Prof. Janakan Sir (digital IC design course)
  • Professor Indranil S. Gupta (hardware modeling playlist)
  • Prof. Samir Pal (book mentioned)
  • Himself/Prep Fusion team (course/platform and channels: “Prep Fusion Gate” and “Prep Fusion”)

Book authors referenced

  • Sadiku: Fundamentals of Electrical Circuits
  • Sedra/Smith: Microelectronic Circuits and Design
  • Razavi: Design of Analog CMOS Integrated Circuits
  • Donald A. Neamen: Microelectronic Circuit Analysis and Design
  • Morris Mano
  • Floyd
  • Patterson (COA book)
  • HKI (author name as spoken; exact full name unclear)

Websites / platforms referenced

  • IndiaBix
  • NPTEL
  • GATE IQ
  • Prep Fusion
  • Telegram group
  • WhatsApp group

Original video